Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, and Verification

Verilog Digital System Design: Register Transfer Level Synthesis, Testbench, and Verification

This rigorous text shows electronics designers and students how to deploy Verilog in sophisticated digital systems design.The Second Edition is completely updated -- along with the many worked examples -- for Verilog 2001, new synthesis standards and coverage of the new OVI verification library.