The RISC-V Reader: An Open Architecture Atlas

The RISC-V Reader: An Open Architecture Atlas

<p><i>The RISC-V Reader</i> is a concise introduction and reference for embedded systems programmers, students, and the curious to a modern, popular, open architecture. RISC-V spans from the cheapest 32-bit embedded microcontroller to the fastest 64-bit cloud computer. The text shows how RISC-V followed the good ideas of past architectures while avoiding their mistake.</p> <p>Highlights include:</p> <ul> <li>Introduces the RISC-V instruction set in only 100 pages, including 75 figures</li> <li>An Instruction Translator Guide to help translate assembly language programs from ARM-32 and x86-32 instruction sets to RISC-V</li> <li>2-page RISC-V Reference Card that summarizes all instructions</li> <li>50-page Instruction Glossary that defines every instruction in detail</li> <li>75 spotlights of good architecture design using margin icons</li> <li>50 sidebars with interesting commentary and RISC-V history</li> <li>25 quotes to pass along wisdom of noted scientists and engineers</li> </ul> <p>Ten chapters introduce each component of the modular RISC-V instruction set--often contrasting code compiled from C to RISC-V versus the older ARM, Intel, and MIPS architectures--but readers can start programming after Chapter 2.</p> <p>Praise for The RISC-V Reader:</p> <ul> <li><i>“This timely book concisely describes the simple, free and open RISC-V ISA that is experiencing rapid uptake in many different computing sectors.”</i> Krste Asanovic, University of California, Berkeley, one of the four architects of RISC-V </li> <li><i>“I like RISC-V and this book as they are elegant—brief, to the point, and complete.”</i> C. Gordon Bell, a computer architecture pioneer</li> <li><i>“ This handy little book effortlessly summarizes all the essential elements of the RISC-V Instruction Set Architecture, a perfect reference guide for students and practitioners alike.”</i> Professor Randy Katz, University of California, Berkeley, one of the inventors of RAID storage systems </li> <li><i>“This clearly-written book offers a good introduction to RISC-V, augmented with insightful comments on its evolutionary history and comparisons with other familiar architectures.”</i> John Mashey, one of the designers of the MIPS architecture</li> <li><i>“This book tells what RISC-V can do and why its designers chose to endow it with those abilities.”</i> Ivan Sutherland, the father of computer graphics </li> <li><i>“RISC-V will change the world, and this book will help you become part of that change.”</i> Professor Michael B. Taylor, University of Washington </li> <li><i>“This book will be an invaluable reference for anyone working with the RISC-V ISA.”</i> Megan Wachs, PhD, SiFive Engineer </li> </ul>